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Tech war: chairman of YMTC, China’s top memory chip maker, warns of ‘turbulence and disorder’ in semiconductor sector amid geopolitical tensions
- YMTC chairman Chen Nanxiang said ‘significant uncertainties’ lie ahead, as the chip industry’s industrial harmony and balance have been disrupted
- As head of China’s top memory chip maker, Chen offered a first-hand impression of his industry’s business prospects amid US-led trade sanctions
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The global semiconductor industry is facing turbulence because of rising geopolitical tensions and the national security concerns of some countries, threatening the sector’s future growth, according to the head of Chinese chip maker Yangtze Memory Technologies Co (YMTC).
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Chen Nanxiang, chairman and acting chief executive of top Chinese memory chip maker YMTC, warned that “significant uncertainties” lie ahead for the industry owing to those disruptions in his keynote presentation at Thursday’s opening in Shanghai of the three-day trade show Semicon China, the world’s largest semiconductor exhibition and conference.
In his 20-minute speech, Chen expressed his disappointment at how the chip industry has become more about “controlling the value chain, reducing risks and inhibiting the development of other countries”, which has upset industrial harmony and balance across the sector.
The YMTC chairman, without elaborating on the challenges confronting his company, indicated that “turbulence and disorder” are now the new norm in the semiconductor industry, following a half-century of vigorous growth.
The speech by Chen offered a first-hand impression from the head of a major Chinese semiconductor enterprise about the current business prospects in the industry amid US-led trade sanctions, which have derailed the mainland’s chip self-sufficiency efforts and its standing in global supply chains.
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YMTC had been hit hard by export controls on chip-making machinery, imposed by the US Commerce Department last October, which aim to cap China’s logic semiconductor production at the 14-nanometre node process, and DRAM and NAND flash at 18-nm and 128 layers, respectively.
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